Lesson 15 — Advanced

Top 50 COA Interview Questions

Ye hai wo 50 questions jo COA mein sabse zyada poochhe jaate hain — GATE, TCS/Infosys aur placement interviews ke liye. Har answer ek line Hinglish mein. Inhein padh lo aur poora course revise ho jaayega — 5 din roz 10 questions, poora COA yaad.

⏱ 20 min• Advanced• All lessons

Basics, Von Neumann & ISA (Q1-13)

WHAT

Ye questions computer ka internal structure, Von Neumann aur instruction basics se hain — interview ka pehla round isi se khulta hai. Har ek ka 1-line answer neeche diya hai.

WHEN

Interview ke pehle 10 minute mein usually yahi poochhe jaate hain — warm-up round. Exams mein bhi definitions yahin se aati hain.

WHERE

TCS, Infosys, Wipro ke technical round, GATE MCQs, UGC-NET — sab jagah ye foundation questions ghoomte hain.

Tarika padhne ka: pehle question padho, khud bol ke answer do, phir dekho. Jo na aaye usse hi mark karo — wahi aaj revise karne hain.

Q1. COA kya hai?           → computer ke internal design + working principles
Q2. Arch vs organisation?  → programmer ko dikhta vs hardware implementation
Q3. Stored program concept? → instructions bhi memory mein data jaisa (Von Neumann)
Q4. Von Neumann vs Harvard? → shared memory vs alag instruction/data memory
Q5. PC kya rakhta hai?      → NEXT instruction ka address (current nahi)
Q6. IR / MAR / MDR?         → current instruction / address / data
Q7. Fetch cycle?            → fetch, decode, execute (+ store)
Q8. ISA kya hai?            → instructions + registers + modes ka set (CPU ki bhasha)
Q9. Opcode vs operand?      → kya karna hai vs kis pe karna hai
Q10. Addressing modes?      → immediate, direct, indirect, register, displacement
Q11. Effective address?     → jahan se operand actually aayega (final address)
Q12. 3-address format?      → ADD R1, R2, R3 (destination alag, RISC style)
Q13. CPI kya?               → ek instruction average kitne cycles leta hai

Tip: Ye 13 interview ka foundation hain. Q5, Q7, Q10 — ye teen aksar dobara ghoom ke aate hain, inhe bullet-proof bana lo.

Arithmetic & Control Unit (Q14-26)

Q14. Full vs half adder?    → 3 inputs (Cin) vs 2 inputs
Q15. RCA vs CLA?           → series carry (slow, n×t) vs parallel carry (fast)
Q16. CLA mein Gi, Pi?       → Generate = Ai.Pi, Propagate = Ai XOR Bi
Q17. Booth algorithm?       → signed multiplication (runs of 1s compress)
Q18. IEEE 754 single fields?→ 1 sign + 8 exp + 23 mantissa
Q19. Bias single/double?    → 127 / 1023
Q20. -6.75 ka float?        → 1 10000001 10110000000000000000000
Q21. ALU kya karta hai?     → arithmetic + logic + shift + compare
Q22. Hardwired CU?          → combinational logic/FSM — fast, rigid
Q23. Microprogrammed CU?    → control memory mein microinstructions — flexible
Q24. Control memory kya?    → microprograms store karne wali memory (CSROM)
Q25. Horizontal vs vertical?→ wide one-hot (parallel) vs narrow encoded (sasta)
Q26. CU ka kaam?            → decode + control signals (khud calculate NAHI)

Ratne wale numbers: IEEE 754 = 1/8/23 bits, bias 127/1023, CLA ki Gi = Ai.Bi aur Pi = Ai XOR Bi equations.
Formula set: CPU time = IC × CPI × T, RCA delay = n × t_FA, AMAT = hit + (1−h) × penalty.
Compare answers: RCA vs CLA, hardwired vs microprogrammed, horizontal vs vertical — in teeno ka format same hai: fast-vs-flexible.

Memory, Cache & Virtual Memory (Q27-39)

Q27. Hierarchy order?       → registers > cache > RAM > disk
Q28. SRAM vs DRAM?          → no refresh/fast/costly vs refresh/dense/sasta
Q29. Cache kyun hoti hai?   → CPU-RAM speed gap + locality exploit
Q30. Mapping ke type?       → direct, fully associative, set-associative
Q31. Direct mapping formula?→ line = block# mod total lines
Q32. Address split?         → tag | index | offset (offset = log2 block size)
Q33. AMAT?                  → hit time + miss rate × miss penalty
Q34. Write-through vs back? → har write memory+cache vs dirty block pe
Q35. Virtual memory kya?    → chhoti RAM pe bada program (demand paging)
Q36. Paging vs segmentation?→ fixed pages (OS) vs variable segments (logical)
Q37. TLB?                   → page table ka fast cache (translation)
Q38. Page fault?            → refer ki page RAM mein nahi (disk se aayegi)
Q39. Thrashing / Belady?    → bahut zyada faults / FIFO mein anomaly

Numerical alert: AMAT, tag bits aur page table size — ye teen numerical interview mein bhi aur exam mein bhi aate hain. Formula yaad nahi ho toh logic se derive karo: hit + (1−h)×penalty.

Pipelining, I/O & RISC/CISC (Q40-50)

Q40. 5 stages?              → IF, ID, EX, MEM, WB
Q41. Pipeline time formula? → (k + n - 1) × cycle time; speedup → k
Q42. Hazard kya?            → dependency/conflict jisse pipeline rukta hai
Q43. Hazard ke type?        → structural, data, control
Q44. RAW?                   → write ke baad read (sabse common data hazard)
Q45. Load-use hazard?       → forwarding ke baad bhi 1 stall minimum
Q46. Forwarding kya?        → result stage se seedha agle ko (bypass)
Q47. Polling vs interrupt?  → CPU baar baar poochhe vs device khud bole
Q48. DMA?                   → CPU ke bina block transfer (setup + interrupt)
Q49. Memory vs I/O mapped?  → shared space (LOAD/STORE) vs IN/OUT (alag space)
Q50. RISC vs CISC?          → fixed+load/store+hardwired vs complex+variable+
                              microcoded (x86 vs ARM)

Final tip: In 50 mein se 30+ har CS interview mein ghoom ke aate hain. Har section ke baad aankh band karke dobara bolo — jo yaad na ho, wahi wapas padho. Roz 10 = 5 din mein poora COA ready.

Exercise

Question: Pipeline ke 5 stages comma se, order mein (IF se shuru).

Question: IEEE 754 single precision mein sign, exponent, mantissa ke bits (comma se, order mein).

Question: Direct mapping mein line number kaise nikalte hain? (block number ... total lines — ek operator batao)

Common mistakes

Sirf ratta, samajh nahi: Ye answers concepts se aate hain. Base clear hai toh ratne ki zarurat nahi — khud bol paoge, interviewer ko lagta bhi nahi ratta hai.
Ek line ka answer chhod dena: Interview mein 1 line + ek example = complete answer. Sirf "forwarding hoti hai" mat bolo — "EX ka result seedha agle EX tak wire se" bolo.
Practice na karna: Padhne se yaad hoga, bolne se aayega. Aaina ke saamne ya dost ko phone karke revise karo — 50 mein se 40+ pakke ho jaayenge.

Desi example: Interview se pehle ki chai

Interview wale din ye 5 must-revise — sabse zyada yahin se poochhte hain:

1. Von Neumann + fetch cycle (PC/MAR/MDR)
2. Addressing modes (immediate/direct/indirect) + EA
3. Cache mapping + AMAT
4. 5-stage pipeline + hazards (RAW, load-use 1 stall)
5. RISC vs CISC + DMA
Ye 5 = COA interview ka 80% coverage

Exam mapping (TCS / Infosys / GATE)

TCS NQT: COA se 5-8Q — types, definitions, formulas (in 50 se cover).
Infosys/Wipro: conceptual explain karna padta hai — 2 line answers rakho.
GATE: numericals (AMAT, speedup, float) — ye list revise karo formulas ke saath.
Trap: definitions exact wording mein poochhte hain — key terms (effective address, hit ratio) precise bolo.

Lesson complete?

Course complete! COA ka poora safar — Von Neumann se lekar RISC/CISC tak — tumne cover kar liya. Ab GATE mock ya placement prep mein ise weekly revise karo, aur aage ke paths (DSA, OS depth) pe jao.