Lesson 2 — Beginner

Von Neumann Architecture

Aaj ke har computer ka base Von Neumann architecture hai — jismein program aur data dono ek hi memory mein rehte hain. Is lesson mein hum dekhenge stored program concept kya hai, fetch cycle kaise chalta hai, registers kya karte hain, aur Harvard architecture se kya farak hai.

Stored program concept

Pehle ke computers mein program badalne ke liye wiring dobara badalni padti thi. Von Neumann ne kaha — program ko bhi memory mein likh do, CPU usi tarah padh lega jaise data padhta hai. Isi se software ka concept janma.

Fetch-decode-execute cycle

Step 1 FETCH : PC ka address → MAR (Memory Address Register)
                Memory read → data MDR mein → IR (Instruction Register)
                PC = PC + 1 (agle instruction ki taraf)
Step 2 DECODE: Control Unit IR ka opcode padhta hai — kya karna hai
Step 3 EXECUTE: ALU/CU instruction perform karta hai
                (add, load, jump — jaisa opcode bole)
Step 4 RESULT: Result register ya memory mein store

Ye cycle clock ke saath baar baar chalta hai — GHz = billions cycles/sec

• PC (Program Counter): AGLE instruction ka address rakhta hai — current nahi.
• IR (Instruction Register): jo instruction abhi fetch hui hai wo.
• MAR: memory mein kaun sa address? — bus pe address isse jaata hai.
• MDR/MBR: memory se aaya/jaane wala data — bus pe data yahin se.
• ACC/Flags: ALU ke results aur status (zero, carry, sign).

Von Neumann ka structure — kya kaise judta hai

Major components :
1. CPU (CU + ALU + Registers)
2. Main Memory (instructions + data)
3. Input / Output devices
4. Bus system : address bus (one-way) + data bus (two-way) + control bus

Data flow (instruction ke liye) :
  PC → MAR → [Bus] → Memory → MDR → IR → Decode → Execute

Control flow :
  CU decide karta hai kab memory read, kab write, kab ALU op —
  ye control signals CONTROL BUS pe jaate hain

In sabka matlab: har cheez bus ke through ek doosre se baat karti hai. CPU seedhe memory ko unplug karke nahi poochta — address bus pe address jaata hai, control bus pe "padho/likho" ka signal jaata hai, data bus se data aata jaata hai.

Memory ko do tarike se access kar sakte ho — byte-addressable (har byte ka apna address, aaj kal standard) aur word-addressable (har word ka ek address, purane systems). Numericals mein address calculation isi par depend karta hai.

Von Neumann vs Harvard architecture

Parameter     | Von Neumann            | Harvard
--------------+------------------------+-------------------
Memory        | ek hi (shared)         | alag (instr + data)
Buses         | ek shared bus set      | alag buses
Fetch speed   | instruction aur data   | dono ek saath
              | turn se chalte hain    | fetch ho sakte hain
Cost          | sasta, simple          | zyada wires, mehnga
Use           | general purpose CPUs   | DSP, microcontrollers,
              | (PC, laptop)           | embedded (8051, ARM
              |                        | ke kuch cores)

Von Neumann bottleneck : ek hi memory-bandwidth par
  instruction bhi jaana, data bhi — isliye pipeline chadhne pe
  do ports ya split cache (L1I + L1D) banaye jaate hain

Aaj kal ke processors practical mein donon ka mix chalte hain — bahar se shared RAM (Von Neumann), andar se caches split (Harvard). Isliye donon concepts jaanna zaroori hai.

Exercise

Common mistakes

• PC ko current instruction address samajhna: PC hamesha NEXT (agle) instruction ka address rakhta hai. Current instruction IR mein hoti hai.
• MAR aur MDR ka farak ulta bolna: MAR = address (kahan jana hai), MDR = data (kya aaya/gaya). Exam mein dono ka swap karke option dete hain.
• Harvard ko shared memory wala samajhna: Harvard = separate instruction aur data memory (parallel fetch). Shared = Von Neumann.

Fetch   : recipe uthai (next order ki)
Decode  : samjha kya banana hai
Execute : pakaya (ALU/CU ne)
Repeat  : agla order — tezi se
Almari = memory : recipe (program) + ingredients (data), dono ek jagah